The present invention relates to a semiconductor memory element and a semiconductor device.
In recent years, flash memories which are semiconductor nonvolatile memories have become introduced into a large number of apparatuses as the ones for storing programs or for storing data. The problem encountered with the flash memories is the price thereof. The price per capacity thereof is several or more fold higher as compared with other media such as hard disks, magneto-optic disks, and DVDs, resulting in a demand for cost reduction. The cost reduction can be achieved most effectively by a decrease in chip area. In contrast, there has been adopted in the prior art an approach of reducing the area of the memory cell. This is implemented by physically reducing the memory cell size due to miniaturization. One example of the memory cell size reduction due to miniaturization is described in H. Miwa et al. “A 140 mm2 64 Mb AND Flash Memory with A 0.4 μm Technology” IEEE, International Solid-State Circuit Conference 1996, p34–35 (1996). Alternatively, the so-called multi-level technology has come into actual use, which enables every memory cell to store two bits of information, thereby to effectually reduce the memory cell area per bit, or other approaches have been made. The prior art example of the multi-level memory is described in T. Jung et al., “A 3.3V 128 Mb Multi-Level NAND Flash Memory for Mass Storage Applications” IEEE International Solid-State Circuit Conference 1996, p32–33 (1996).